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首页> 《中国测试》期刊 >本期导读>一种CPGA微电子器件PIND夹具及试验方法研究

一种CPGA微电子器件PIND夹具及试验方法研究

157    2019-12-30

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作者:周帅, 吕宏峰, 王斌, 黄煜华

作者单位:工业和信息化部电子第五研究所, 广东 广州 510610


关键词:CPGA器件;PIND试验;芯腔向下;多余颗粒;夹具设计


摘要:

根据气密封装微电子器件粒子碰撞噪声检测(PIND)原理及试验要求,优化PIND试验方法,并提出被试器件内腔高度与频率的计算公式。然后,分析芯腔面向下的陶瓷针栅阵列封装(CPGA)微电子器件内部结构特点,从材料的刚性、共振频率、能量传递及安装方式等方面设计适用于该类封装器件的PIND试验夹具。最后,分别采用人工引入金属及非金属多余物的方式制作CPGA微电子器件盲样。研究结果表明:该夹具及试验方法可以有效解决芯腔面向下的CPGA微电子器件PIND试验共性问题,同时也为其他封装类型器件的PIND试验及后续标准的修订提供依据和帮助。


Research on a PIND fixture for CPGA microelectronic device and test method
ZHOU Shuai, Lü Hongfeng, WANG Bin, HUANG Yuhua
The Fifth Electronics Research Institute of the Ministry of Industry and Information Technology, Guangzhou 510610, China
Abstract: The PIND test method was optimized based on the principle and test requirements of particle collision noise detection (PIND) of hermetic microelectronic devices, and the calculation formulas of the cavity height and frequency of the device under test were proposed. Then internal structure of the ceramic pin grid array (CPGA) microelectronic device with the core cavity facing down was analyzed. The PIND test fixture suitable for this type of package device was designed from the aspects of material rigidity, resonance frequency, energy transfer and installation method, etc. Finally, the CPGA microelectronic device blind sample was produced by manual introduction of metal and non-metal excess particles. The research results prove that the fixture and test method can solve the common problems of the PIND test of the CPGA microelectronic device with the core cavity facing down, and also provide the basis for the PIND test of other package devices and the revision of subsequent standards.
Keywords: CPGA device;PIND test;core cavity facing down;excess particles;fixture design
2019, 45(12):31-35  收稿日期: 2018-12-16;收到修改稿日期: 2019-03-01
基金项目:
作者简介: 周帅(1984-),男,贵州都匀市人,高级工程师,硕士,主要从事电子元器件检测与可靠性研究
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